Future high energy physics experiments will require the development of a linear collider in the TeV region such as TESLA. Because of physics requirements it will be necessary to make precision vertex measurements. This makes a high-resolution vertex detector an essential part of the detecting system. One of the possibilities is to develop a CMOS Monolithic Active Pixel Sensors (MAPS) based detector. A planned prototype chip for the TESLA developments would include an array of identical pixels with their addressing circuits, signal processing within the chip, data sparsification and analogue to digital conversion. For this purpose we have developed a column-based, low power, fully offset compensated multistage comparator (discriminator), to read out the active pixels. For one of the versions implemented a resolution better than 1mV was obtained at operating speeds higher than 10MHz. The power dissipation is of the order of 200µW. A test chip was designed on a 0.35 µm CMOS process from AMI Semiconductor. As the pixel pitch is only 28µm, the dimensions of the comparator are 300µm x 28µm. This design is compatible with the clocking scheme of the pixel array.
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